A Hybrid Radix-4 and Approximate Logarithmic Multiplier for Energy Efficient Image Processing

Multiplication is an essential image processing operation commonly implemented in hardware DSP cores. To improve cores’ area, speed, or energy efficiency, we can approximate multiplication. We present multiplier that generates two partial products using hybrid radix-4 and logarithmic encoding of the input operands. It uses exact to generate product from three most significant bits approximation with mantissa trimming remaining least-significant bits. The proposed fills gap between highly accurate non-logarithmic multipliers a complex design less more straightforward design. evaluated multiplier’s efficiency terms error, (power-delay-product) area utilisation NanGate 45 nm. experimental results show exhibits good consumption behaves well applications.